Transactional memory is a concurrent programming manner in a computer architecture, and is used to implement consistency of data shared by a plurality of processes. A transaction originates from a concept of transaction in a database management system (DBMS). A transaction is an instruction series, including a read operation and a write operation on storage. In the DBMS, the transaction needs to meet atomicity, consistency, isolation, and durability. Atomicity states that either all actions in the transaction are performed, or none are performed. Consistency states that a database needs to be in a consistent state at any time, that is, needs to meet some preset conditions. Isolation states that a status of an internal object in a transaction that is not committed is not visible to another transaction. Durability states that a change made to a database system by a committed transaction is permanent. A key of the transactional memory is to provide a critical region operation that has atomicity, consistency, and isolation such that a plurality of processes can securely access shared data without using a lock. Currently, the transactional memory has two implementations software transactional memory (STM) based on software and hardware transactional memory (HTM) based on hardware.
HTM in other approaches is generally implemented on a level 1, level 2, or level 3 cache of a central processing unit (CPU). For example, transaction conflict detection and transaction rollback mechanisms are implemented by adding a dedicated cache mechanism in the level 1 cache (also referred to as L1 cache). Further, during access of a process, whether a cache line is being operated by another process is determined by tracking all cache lines that are read or written during execution of a transaction. When it is detected that the transaction of the process conflicts with a transaction of the other process, execution of the transaction needs to be terminated. The cache line is used to indicate a segment of consecutive addresses, and the cache line may also be referred to as a data block. In some computer systems, a size of a cache line is 64 bytes. Because tracking detection is performed on all operated cache lines in such an implementation of the transactional memory, high system power consumption is caused. In addition, a detection granularity is relatively coarse, easily causing misdetection.